YALAMANCHILI, S. (2001). INTRODUCTORY VHDL: FROM SIMULATION TO SYNTHESIS. -.
Cita Chicago (17th ed.)YALAMANCHILI, S. INTRODUCTORY VHDL: FROM SIMULATION TO SYNTHESIS. NEW DELHI: -, 2001.
Cita MLA (9th ed.)YALAMANCHILI, S. INTRODUCTORY VHDL: FROM SIMULATION TO SYNTHESIS. -, 2001.
Atenció: Aquestes cites poden no estar 100% correctes.