INTRODUCTORY VHDL : FROM SIMULATION TO SYNTHESIS
Sábháilte in:
| Príomhchruthaitheoir: | |
|---|---|
| Formáid: | LEABHAR |
| Foilsithe / Cruthaithe: |
NEW DELHI
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2001
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| Ábhair: | |
| Clibeanna: |
Cuir clib leis
Níl clibeanna ann, Bí ar an gcéad duine le clib a chur leis an taifead seo!
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MARC
| LEADER | 00000nam a2200000Ia 4500 | ||
|---|---|---|---|
| 100 | |a YALAMANCHILI, S | ||
| 250 | |||
| 020 | |||
| 650 | |a ELECTRONICS ENGG., VHDL , SIMULATION , SYNTHESIS | ||
| 245 | |a INTRODUCTORY VHDL : FROM SIMULATION TO SYNTHESIS | ||
| 260 | |a NEW DELHI |b - |c 2001 | ||
| 082 | |a - | ||
| 300 | |a xii+ 395 | ||
| 952 | |0 0 |1 0 |4 0 |7 0 |9 15403 |a 00000013 |b 00000013 |d 2018-05-02 |g 295.00 |l 0 |o - |p 7555 |r 2017-05-16 00:00:00 |w 2017-05-16 |y BK | ||
| 999 | |c 5211 |d 5211 | ||