APA aipamena

Mano ,M. Morris, & Ciletti, M. D. (2018). Digital Design With an Introduction to the Verilog HDL, VHDL, and System Verilog (6th.). Pearson.

Chicago Style aipamena

Mano ,M. Morris, and Michael D. Ciletti. Digital Design With an Introduction to the Verilog HDL, VHDL, and System Verilog. 6th. India: Pearson, 2018.

MLA aipamena

Mano ,M. Morris, and Michael D. Ciletti. Digital Design With an Introduction to the Verilog HDL, VHDL, and System Verilog. 6th. Pearson, 2018.

Kontuz: berrikusi erreferentzia hauek erabili aurretik.