APA-referens (7:e uppl.)

Mano, M. M. &. C. M. D. (2024). Digital Design With An Introduction To The Verilog HDL, VHDL And Systemverilog (06th.). Pearson.

Chicago-referens (17:e uppl.)

Mano, Morris M. & Ciletti Michael D. Digital Design With An Introduction To The Verilog HDL, VHDL And Systemverilog. 06th. New Delhi: Pearson, 2024.

MLA-referens (9:e uppl.)

Mano, Morris M. & Ciletti Michael D. Digital Design With An Introduction To The Verilog HDL, VHDL And Systemverilog. 06th. Pearson, 2024.